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#openstack-cyborg - 2018-01-24
15:01:40 crushil #info Rushil
15:01:50 Li_Liu #info Li Liu
15:03:02 zhipeng let's wait for a few minutes for others to show up
15:05:59 zhipeng guys if you are here for the meeting
15:06:09 zhipeng please use #info to identify yourself
15:06:33 helloway #info helloway
15:06:55 Dutch #info Dutch
15:07:20 Amol #info amol
15:07:47 Vipparthy #info Vipparthy
15:07:59 zhipeng Amol which company are you from ?
15:09:51 Amol Hi Zhipeng . I am from nvxltech
15:10:16 zhipeng ah thx, same with Vipparthy right ?
15:10:25 Amol Yup
15:11:54 zhipeng cool :)
15:12:10 zhipeng Ok I see Intel folks flowing in, let's start the discussion
15:12:21 zhipeng #topic Queens Release Final Push
15:13:00 dolpher Hi
15:13:38 zhipeng #info Generic Driver
15:13:43 zhipeng #link https://review.openstack.org/525057
15:13:58 shaohe_feng_ hello all
15:14:01 zhipeng crushil have you look at the comments from shaohe_feng_ and others ?
15:15:06 crushil zhipeng, yup. I'm working on the patch rn. Will push a new patchset by this week
15:15:46 zhipeng I have to cut the release branch Monday next week, so the window is pretty tight :)
15:16:15 zhipeng I will need your workflow+1 during the weekend crushil :P
15:16:32 crushil Hmmm. Ok
15:16:43 crushil I will be online on the weekend
15:16:47 zhipeng This is the final frenzy kicks in
15:16:52 zhipeng gr8t thx :)
15:16:57 zhipeng okey moving on
15:17:07 zhipeng #info Intel FPGA driver
15:17:19 zhipeng #link https://review.openstack.org/531129
15:17:54 zhipeng Li_Liu has shaohe_feng_ addressed your comments ?
15:18:57 Li_Liu I havn't had the chance to look at the new patch yet
15:19:05 Li_Liu Doing it now
15:19:22 zhipeng okey
15:19:46 zhipeng shaohe_feng_ other than the comments you received, code-wise is your patch ready ?
15:19:52 Dutch I can also add some input to help keep things vendor neutral
15:20:05 zhipeng Dutch absolutely
15:20:39 shaohe_feng_ zhipeng: I have test it on our platform, it can works.
15:21:06 shaohe_feng_ zhipeng: but maybe we still need to introduce rootwraper
15:21:07 zhipeng okey then here are my suggestions:
15:21:27 zhipeng no rootwrapper for queens :)
15:21:33 zhipeng we need to discuss that in Dublin
15:21:47 zhipeng So here are my suggestions at the patch :
15:22:02 shaohe_feng_ the program need root for both intel and xilinx
15:22:05 zhipeng again due to the tight release window, we will have to land this patch this weekend
15:22:17 dolpher Li_Liu, Dutch: current implementation in fpga/intel is specific to intel FPGA, for Xilinx, we may need to create a directory of fpga/Xilinx
15:22:44 Li_Liu dolpher, I agree
15:22:44 zhipeng as I understand the comments are mostly on vendor neutral, as dolpher just mentioned
15:23:00 dolpher we need to make the interface generic in the end.
15:23:06 zhipeng so I would suggest to change the patch accordingly to reflect that this is an Intel FPGA driver
15:23:15 Li_Liu only issue I have is in cyborg/accelerator/drivers/fpga/util.py
15:23:26 zhipeng and let's try to harmonize it in the long run
15:23:40 zhipeng poor gerrit
15:24:22 shaohe_feng_ gerrit need rest :)
15:25:27 zhipeng anyway, shaohe_feng_ you captured my suggestion ?
15:26:14 shaohe_feng_ yes
15:26:24 zhipeng great :)
15:26:29 zhipeng next item
15:26:45 zhipeng #info Justin leftovers: conductor interaction with Placement
15:26:51 zhipeng not sure if zhuli is here
15:27:32 zhipeng but as I have discussed with zhuli and Li_Liu offline previously, we will need to quick modify and copy-paste of nova-sched report.py
15:28:00 zhipeng and also an extension at the agent level to implement the discover function in full
15:28:22 zhipeng This is also another big hole we need to fix in a short time
15:28:36 zhipeng shaohe_feng_ can your team help on the agent side ?
15:29:07 zhipeng what we need is an equal counterpart of "resource_tracker.py" in cyborg
15:29:19 shaohe_feng_ OK
15:29:32 zhipeng which I assume is the discover interface that is very basic at the moment
15:29:57 shaohe_feng_ yes.
15:30:33 zhipeng okey thx :) zhuli and Li_Liu will coordinate on the conductor side
15:30:38 zhipeng moving on
15:30:40 Li_Liu sure
15:30:44 zhipeng #info fix on devstack
15:31:10 shaohe_feng_ resource_tracker.py will check resource periodically
15:32:12 zhipeng shaohe_feng_ we can simplify that for queens
15:32:23 zhipeng and write to db instead of a provider-tree like cache
15:32:33 zhipeng but anyways, back to the topic
15:32:43 zhipeng #link https://review.openstack.org/536251
15:32:56 zhipeng another good patch from Jinghan to make devstack working
15:33:16 zhipeng crushil if you thinks it ok you could just land it :)
15:34:55 crushil zhipeng, Ok. Will look at it later today
15:35:15 zhipeng gr8t thx :)
15:35:50 zhipeng okey folks that is all we need to do for Queens, I see Nova is still panicking on landing patches, so we are not alone :)
15:36:05 zhipeng let's try to wrap it up before next Mon
15:36:18 dolpher :)
15:36:49 zhipeng release is always driving people insane
15:37:53 zhipeng #action crushil to update the generic driver patch, and work with Howard to land all the remaining patches
15:38:21 crushil I thought the release data was feb 4th?
15:38:24 zhipeng #action shaohe_feng_ to update the patch to reflect the patch is Intel FPGA driver
15:38:44 zhipeng crushil that is like hard cutof, we have to run through the CIs and other stuff
15:38:47 zhipeng docs ...
15:38:53 crushil Hmmm
15:39:08 zhipeng so I left out a week of time for more panicking stuff lol
15:39:11 crushil Ok, so are we cutting RC1, RC2, etc.
15:39:12 crushil ?
15:39:18 zhipeng not for this release
15:39:22 crushil Ok
15:39:29 crushil We need to start doing that from Rocky
15:39:30 zhipeng but for Rocky we are gonna use the MS1,MS2,...
15:39:37 crushil Ok, makes sense

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