| Posted | Nick | Remark | |
|---|---|---|---|
| #openstack-cyborg - 2018-01-17 | |||
| 15:54:37 | zhuli | thanks, that's very helpful | |
| 15:55:20 | Dutch | These are most of the user guides in one place instead of dealing with the PDFs, contents are the same | |
| 15:55:21 | zhipeng | gr8t thx! | |
| 15:55:40 | zhipeng | are there any support yet in the OpenStack for SDAccel ? | |
| 15:55:46 | zhipeng | for example nova driver ? | |
| 15:56:41 | Dutch | There is also a helpful platform guide UG1164, this is still a PDF | |
| 15:56:47 | Dutch | #link https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1164-sdaccel-platform-development.pdf | |
| 15:57:11 | NokMikeR | are there any xilinx parts with an open bitstream? (and tools to program them)? | |
| 15:57:33 | Dutch | Still no nova support, our openstack cluster is using pass-through, which as you can image is a serious limitation | |
| 15:59:08 | Dutch | The drivers could be open, but bitstream generation is IP so unlikely we will ever see that open | |
| 16:00:00 | Dutch | NokMikeR, what in particular do you want open? | |
| 16:00:40 | NokMikeR | any way to program the device via e.g an arm cpu so the synthesis and routing is done on the board - that way the entry level for the programmer is lower. | |
| 16:03:13 | Dutch | For drivers and runtime, absolutely. For synthesis and P&R, I am less sure. | |
| 16:04:01 | Dutch | I am also not sure what "done on the board" means | |
| 16:04:59 | NokMikeR | pcie board with fpga + additional cpu to generate the bitstream. you send that vhdl/verilog, "other code" and it all magically works :) | |
| 16:05:34 | NokMikeR | self contained basically. no reliance on vivado etc. | |
| 16:06:10 | NokMikeR | anyhow we are offtopic here, so Howard please carry on :) | |
| 16:06:26 | zhipeng | no this is actually an interesting topic :P | |
| 16:06:27 | Dutch | It is nice to think about but yeah, I would say that is a ways off | |
| 16:07:25 | zhipeng | NokMikeR I know there are open source bitstream FPGA cards, but not sure if it is production level | |
| 16:07:46 | Dutch | It might be possible to run Vivado on the add-in-card but as far as Vivado being open that seems very unlikely | |
| 16:08:03 | Dutch | I would push the currently open project to do something like this | |
| 16:08:25 | zhipeng | Dutch so coming back to SDAccel, the software defined here refering to ? | |
| 16:09:25 | Dutch | SDAccell was initially built to support OpenCL memory model, and there is also support for OpenCL kernel code | |
| 16:09:49 | Dutch | but it has advanced some to support iteration of HLS C and RTL IP | |
| 16:10:21 | zhipeng | got it | |
| 16:10:38 | Dutch | It was designed to be flexible so that it would support future models, MPI for example | |
| 16:11:10 | zhipeng | folks thx very much for the gr8t discussion today, i'm afraid I have to close the meeting now | |
| 16:11:45 | zhipeng | please go help reviewing the patch or drafting one, we have two weeks left before Queens code freeze | |
| 16:12:05 | zhipeng | so let's squeeze in as many stuff as we could :) | |
| 16:12:33 | NokMikeR | was the devstack bug report about the permissions for cyborg solved? | |
| 16:13:14 | zhipeng | yes NokMikeR | |
| 16:13:22 | NokMikeR | Great :) | |
| 16:14:09 | zhipeng | okey meeting adjourned | |
| 16:14:13 | zhipeng | #endmeeting | |
| 16:14:15 | openstack | Meeting ended Wed Jan 17 16:14:13 2018 UTC. Information about MeetBot at http://wiki.debian.org/MeetBot . (v 0.1.4) | |
| 16:14:16 | openstack | Minutes: http://eavesdrop.openstack.org/meetings/openstack_cyborg/2018/openstack_cyborg.2018-01-17-15.03.html | |
| 16:14:17 | openstack | Minutes (text): http://eavesdrop.openstack.org/meetings/openstack_cyborg/2018/openstack_cyborg.2018-01-17-15.03.txt | |
| 16:14:18 | openstack | Log: http://eavesdrop.openstack.org/meetings/openstack_cyborg/2018/openstack_cyborg.2018-01-17-15.03.log.html | |
| 16:14:49 | Vipparthy | Thank you folks | |
| 16:14:56 | NokMikeR | Thanks all, bye | |
| 16:15:12 | Dutch | Thanks! | |
| 17:51:07 | guhcampos | Hi folks, a quick question: I may need to implement our driver for cyborg. Is there a way to write it as a plugin? Like a separate python package that can be installed alongside cyborg? Or do I have to add it to cyborg's tree alongside the generic driver? | |
| 17:54:46 | crushil_ | guhcampos, Add it to Cyborg's tree alongside the generic driver | |
| 17:55:28 | guhcampos | crushil_, thanks. I needed this confirmation to pressure management to sign the contributor agreement | |
| #openstack-cyborg - 2018-01-24 | |||
| 14:55:03 | Vipparthy | GM and GE folks | |
| 14:59:43 | zhipeng | yo | |
| 14:59:55 | zhipeng | Vipparthy good day :) | |
| 15:00:05 | zhipeng | #startmeeting openstack-cyborg | |
| 15:00:06 | openstack | Meeting started Wed Jan 24 15:00:05 2018 UTC and is due to finish in 60 minutes. The chair is zhipeng. Information about MeetBot at http://wiki.debian.org/MeetBot. | |
| 15:00:07 | openstack | Useful Commands: #action #agreed #help #info #idea #link #topic #startvote. | |
| 15:00:10 | openstack | The meeting name has been set to 'openstack_cyborg' | |
| 15:00:24 | zhipeng | #topic Roll Call | |
| 15:00:41 | crushil | \o | |
| 15:00:48 | zhipeng | #info Howard | |
| 15:01:40 | crushil | #info Rushil | |
| 15:01:50 | Li_Liu | #info Li Liu | |
| 15:03:02 | zhipeng | let's wait for a few minutes for others to show up | |
| 15:05:59 | zhipeng | guys if you are here for the meeting | |
| 15:06:09 | zhipeng | please use #info to identify yourself | |
| 15:06:33 | helloway | #info helloway | |
| 15:06:55 | Dutch | #info Dutch | |
| 15:07:20 | Amol | #info amol | |
| 15:07:47 | Vipparthy | #info Vipparthy | |
| 15:07:59 | zhipeng | Amol which company are you from ? | |
| 15:09:51 | Amol | Hi Zhipeng . I am from nvxltech | |
| 15:10:16 | zhipeng | ah thx, same with Vipparthy right ? | |
| 15:10:25 | Amol | Yup | |
| 15:11:54 | zhipeng | cool :) | |
| 15:12:10 | zhipeng | Ok I see Intel folks flowing in, let's start the discussion | |
| 15:12:21 | zhipeng | #topic Queens Release Final Push | |
| 15:13:00 | dolpher | Hi | |
| 15:13:38 | zhipeng | #info Generic Driver | |
| 15:13:43 | zhipeng | #link https://review.openstack.org/525057 | |
| 15:13:58 | shaohe_feng_ | hello all | |
| 15:14:01 | zhipeng | crushil have you look at the comments from shaohe_feng_ and others ? | |
| 15:15:06 | crushil | zhipeng, yup. I'm working on the patch rn. Will push a new patchset by this week | |
| 15:15:46 | zhipeng | I have to cut the release branch Monday next week, so the window is pretty tight :) | |
| 15:16:15 | zhipeng | I will need your workflow+1 during the weekend crushil :P | |
| 15:16:32 | crushil | Hmmm. Ok | |
| 15:16:43 | crushil | I will be online on the weekend | |
| 15:16:47 | zhipeng | This is the final frenzy kicks in | |
| 15:16:52 | zhipeng | gr8t thx :) | |
| 15:16:57 | zhipeng | okey moving on | |
| 15:17:07 | zhipeng | #info Intel FPGA driver | |
| 15:17:19 | zhipeng | #link https://review.openstack.org/531129 | |
| 15:17:54 | zhipeng | Li_Liu has shaohe_feng_ addressed your comments ? | |
| 15:18:57 | Li_Liu | I havn't had the chance to look at the new patch yet | |
| 15:19:05 | Li_Liu | Doing it now | |
| 15:19:22 | zhipeng | okey | |
| 15:19:46 | zhipeng | shaohe_feng_ other than the comments you received, code-wise is your patch ready ? | |
| 15:19:52 | Dutch | I can also add some input to help keep things vendor neutral | |
| 15:20:05 | zhipeng | Dutch absolutely | |
| 15:20:39 | shaohe_feng_ | zhipeng: I have test it on our platform, it can works. | |
| 15:21:06 | shaohe_feng_ | zhipeng: but maybe we still need to introduce rootwraper | |
| 15:21:07 | zhipeng | okey then here are my suggestions: | |
| 15:21:27 | zhipeng | no rootwrapper for queens :) | |
| 15:21:33 | zhipeng | we need to discuss that in Dublin | |
| 15:21:47 | zhipeng | So here are my suggestions at the patch : | |
| 15:22:02 | shaohe_feng_ | the program need root for both intel and xilinx | |