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#openstack-cyborg - 2019-04-24
03:01:40 Sundar Good to have many of us right at the beginning
03:02:23 Sundar Agenda: PTG session time allocation, Summit project update slides
03:02:27 Sundar Anything else?
03:03:08 Li_Liu Have we decided the team dinner date yet?
03:03:39 Sundar It is Thu evening. But we haven't decided a place yet. I'll leave that to all of you
03:04:00 Li_Liu ok
03:04:08 yikun 2th May, right?
03:04:21 Sundar yikun: Yes
03:04:26 yikun Sundar: ok
03:04:30 Coco_gao OK, maybe we can keep the old place.
03:04:33 Sundar #topic PTG session planning
03:05:20 Sundar We have 3.5 hours on Thu afternoon (1:30-5) and 2.5 hours on Fri afternoon (1:30-4) because I need to leave by 4 to catch my flight
03:05:33 Sundar Not much time! We need to plan the sessions tightly
03:05:48 Sundar You can all continue on Fri eve and on Sat too, when I am gone
03:06:48 Sundar BTW, Fri morn are the cross-projects with Nova and ironic
03:06:52 wangzhh #info wangzhh
03:07:25 Sundar Shall we start allocating times to the topics in Looking at: https://etherpad.openstack.org/p/cyborg-ptg-train ?
03:07:51 Sundar s/Looking at//
03:08:01 xinranwang Hi all
03:08:07 yikun xinranwang: hi
03:08:16 Sundar Hi xinranwang, wangzhh and Yumeng
03:08:28 xinranwang #info xinranwang
03:08:42 xinranwang hi Sundar yikun
03:08:45 Yumeng Hi Sundar, and all
03:08:50 Yumeng # info Yumeng
03:09:00 wangzhh Hi Sundar, hi all.
03:09:04 Sundar Retrospective: keep it to 10 min?
03:09:51 Sundar Too short?
03:10:16 yikun Sundar: I think we should classify these topic in etherpad, such as, driver, api, common/design...and then do the allocation tiems
03:10:27 yikun * times
03:11:11 Coco_gao 10min if no other people join, because we all familar with the project status.
03:11:26 Coco_gao Sundar, agree with yikun
03:11:38 Sundar yikun: ok. The main topics in my mind are: Train Goals, Networked FPGAs, mapping names to UUIDs, new drivers/devices (incl. Ascend)
03:11:39 Coco_gao Better to classify
03:12:15 wangzhh Yikun, do you need more time for topic #line 58?
03:12:16 Sundar Some of them are cross-cutting across these categories, esp. first 2
03:12:52 yikun wangzhh: checking...
03:13:56 yikun wangzhh: bitstream management? So what's the "more time" mean? you mean the more time to discuss in PTG?
03:14:42 wangzhh Yep, I saw you leave comment 'expand the bitstream to more generic level'. So...
03:14:50 Sundar yikun, all: In my mind, bitstream mgmt means Cyborg provides APIs to parse metadata for bitstreams, validate and upload in Glance. What else do you have in mind?
03:15:37 Sundar I think firmware update etc. are usually done as part of host config, with pupper/ansible/...
03:15:54 Sundar *puppet
03:16:12 yikun wangzhh: ok, make sense, it is just some idea for "Do not provide specific API for specific type driver."
03:16:49 wangzhh Got it.
03:16:51 ikuo_o Sundar: I'm thinking bitstream md5 checksum to check integrity.
03:16:55 Coco_gao I thought there were a generic Driver in code, but we don't use that or inherit from that.
03:17:51 Sundar ikuo_o: That is up to the vendor stack, because they may use different checksums, authentication/decryption schemes, or even do it in hardware in some cases
03:18:13 Coco_gao About the bug, do we need specific time for that?
03:18:14 wangzhh Coco, Yep, but, actually, it is out of date. Should be improved as our new design.
03:18:22 yikun Coco_gao: yes, https://github.com/openstack/cyborg/blob/master/cyborg/accelerator/drivers/generic_driver.py
03:18:49 Coco_gao Thanks, yikun. The generic driver is too old.
03:18:55 Sundar Have you all looked at the driver API in Line 396 https://review.opendev.org/#/c/608624/4/specs/stein/approved/cyborg-api-wflows-for-instance-ops.rst ? The can_handle API can be dropped but can you review the rest?
03:20:07 yikun So these APIs is belong to the generic_driver.py?
03:20:55 Sundar Anyways, I'll take a first stab like this: 30 min each for Train Goals, Networked FPGAs, mapping names to UUIDs, new drivers/devices, NTT's discussion. That is 2.5 hours. Now we can add more time to some of these topics and fit more on Friday
03:20:56 Coco_gao Sundar, OK
03:21:32 yikun Sundar: sounds good
03:21:33 Sundar May be new devices needs more time
03:22:13 ikuo_o Thanks, Sundar!
03:22:53 Sundar ikuo_o: Welcome :)
03:23:03 Coco_gao I need some time in Friday to dicuss the dirty data caused by conductor diff.
03:23:29 Sundar Coco_gao: Good. Conductor diff: 15-30 min?
03:23:37 Coco_gao That's good
03:23:51 Sundar PCI slot change on reboot -- why is it any different than Nova's PCI subsystem?
03:25:34 Coco_gao I will make sure with shaohe, and see if we need to discuss that.
03:25:51 Sundar wangzhh, Coco_gao: any performance countres planned for GPUs? I am thinking just report driver-reported perf counters from agent to a collectd plugin. From there, it can be consumed by telemetry/ceilometer, prometheus, ....
03:25:53 Coco_gao Right now , we can skip that
03:26:04 Sundar Coco_gao: ok
03:27:45 yikun Who is the owner of L42 idea? I plus some info on it
03:28:24 Sundar yikun: do you mean SmartNIC?
03:28:33 yikun "Performance/health monitoring for GPUs or any other devices?"
03:30:01 wangzhh Whuuu, difficult to monitor it now, because when we passthrough the GPU in the vm. Host will lost control of this device. I'll consider about that.
03:30:36 Sundar yikun: I responded too. I would like to find an owner.
03:31:00 ikuo_o I'm not the owner but the function seems useful.
03:31:08 wangzhh Does FPGA or other devices have the same scenario?
03:31:10 Sundar wangzhh: yea, same problem for FPGAs, but we should have the PF in the host from where we can get shell counters.
03:31:45 Sundar Besides, we also have dependence on the vendor stack
03:32:04 Sundar yikun: Does Ascend support SR-IOV?
03:32:27 wangzhh Sundar, Yep. Depend on vendor stack.
03:33:58 Sundar If Ascend supports SR-IOV, and we can get performance counters from its PF, we have a potential use case. Otherwise, we'll focus on other practical things and then come to this.
03:35:14 yikun Sundar: ascend 310 don't support sr-iov yet
03:35:25 Sundar Then shall we deprioritize this topic for PTG?
03:36:00 xinranwang ascend support entire pci passthrough right
03:36:05 yikun yes
03:36:26 yikun passthrough is supported.
03:36:44 wangzhh Sundar, Depend on the priorities and our time.
03:36:46 yikun Sundar: I think we still can add this topic in PTG
03:37:16 Sundar OK, I only said de-prioritized. So, if there's time after topics, sure
03:37:46 Sundar Driver support for Movidius - who owns this?
03:38:05 yikun Shaohe?
03:38:06 xinranwang Sundar: i think is Shaohe
03:38:08 Coco_gao Coco
03:38:37 Sundar RISC-V?
03:39:06 Coco_gao We use Movidius in the Edge.
03:39:32 yikun Movidius is a USB device, right?
03:39:33 Sundar Coco_gao: Cool. Maybe both you and Shaohe can drive it?
03:39:42 Coco_gao Yes
03:40:38 Coco_gao It's USB right now, in order to use it, we need to install openvino
03:40:44 Sundar I should a topic for post-PTG plans. That's important. Merge pilot with master, add FPGA CI, etc. are important for Nova intgration
03:41:03 Coco_gao Sundar, agree
03:41:17 Coco_gao the most important thing is nova integration

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